Datasheet

78K0/Kx2-L CHAPTER 5 CLOCK GENERATOR
R01UH0028EJ0400 Rev.4.00 229
Sep 27, 2010
5.6.5 Clocks supplied to CPU and peripheral hardware
The following table shows the relation among the clocks supplied to the CPU and peripheral hardware, and setting of
registers.
Table 5-4. Clocks Supplied to CPU and Peripheral Hardware, and Register Setting
(78K0/KY2-L, 78K0/KA2-L, and 78K0/KB2-L)
Supplied Clock
Clock Supplied to CPU Clock Supplied to Peripheral Hardware
XSEL MCM0 EXCLK
Internal high-speed oscillation clock 0
× ×
X1 clock 1 0 0 Internal high-speed oscillation clock
External main system clock 1 0 1
X1 clock 1 1 0
External main system clock 1 1 1
Remarks 1. The 78K0/KY2-L, 78K0/KA2-L, and 78K0/KB2-L are not provided with a subsystem clock.
2. XSEL: Bit 2 of the main clock mode register (MCM)
MCM0: Bit 0 of MCM
EXCLK: Bit 7 of the clock operation mode select register (OSCCTL)
×: don’t care
Table 5-5. Clocks Supplied to CPU and Peripheral Hardware, and Register Setting (78K0/KC2-L)
Supplied Clock
Clock Supplied to CPU Clock Supplied to Peripheral Hardware
XSEL CSS MCM0 EXCLK
Internal high-speed oscillation clock 0 0
× ×
X1 clock 1 0 0 0 Internal high-speed oscillation clock
External main system clock 1 0 0 1
X1 clock 1 0 1 0
External main system clock 1 0 1 1
Internal high-speed oscillation clock 0 1
× ×
1 1 0 0 X1 clock
1 1 1 0
1 1 0 1
Subsystem clock
External main system clock
1 1 1 1
Remark XSEL: Bit 2 of the main clock mode register (MCM)
CSS: Bit 4 of the processor clock control register (PCC)
MCM0: Bit 0 of MCM
EXCLK: Bit 7 of the clock operation mode select register (OSCCTL)
×: don’t care