Datasheet

78K0/Kx2-L CHAPTER 5 CLOCK GENERATOR
R01UH0028EJ0400 Rev.4.00 219
Sep 27, 2010
Cautions 1. If the voltage rises with a slope of less than 0.5 V/ms (MIN.) from power application until the
voltage reaches 1.8 V, input a low level to the RESET pin from power application until the voltage
reaches 1.8 V, or set the LVI default start function enabled by using the option byte (LVISTART =
1) (refer to Figure 5-17). When a low level has been input to the RESET pin until the voltage
reaches 1.8 V, the CPU operates with the same timing as <2> and thereafter in Figure 5-16, after
the reset has been released by the RESET pin.
2. It is not necessary to wait for the oscillation stabilization time when an external clock input from
the EXCLK and EXCLKS pins is used.
Remark While the microcontroller is operating, a clock that is not used as the CPU clock can be stopped via software
settings. The internal high-speed oscillation clock and high-speed system clock can be stopped by
executing the STOP instruction (refer to (4) in 5.6.1 Example of controlling high-speed system clock,
(3) in 5.6.2 Example of controlling internal high-speed oscillation clock, and (4) in 5.6.3 Example of
controlling subsystem clock).
Figure 5-17. Clock Generator Operation When Power Supply Voltage Is Turned On
(When LVI Default Start Function Enabled Is Set (Option Byte: LVISTART = 1))
0 V
1.91 V (TYP.)
Internal high-speed
oscillation clock (f
IH )
CPU clock
High-speed
system clock (f
XH )
(when X1 oscillation
selected)
Subsystem clock (f
SUB )
(when XT1 oscillation
selected)
Note 2
Internal reset signal
Power supply
voltage (V
DD )
Internal high-speed
oscillation clock
High-speed system clock
Switched by
software
Subsystem clock
Note 2
<5>
<1>
<3>
<2>
<4>
<4>
<5>
X1 clock
oscillation stabilization time:
2
8
/f X to 2
18
/f X
Note 1
Starting X1 oscillation
is set by software.
Starting XT1 oscillation
is set by software.
Reset processing (12 to 51 μs)
Waiting for oscillation
accuracy stabilization
(102 to 407 μs)
<1> When the power is turned on, an internal reset signal is generated by the power-on-clear (POC) circuit.
<2> When the power supply voltage exceeds 1.91 V (TYP.), the reset is released and the internal high-speed
oscillator automatically starts oscillation.
<3> After the reset is released and reset processing is performed, the CPU starts operation on the internal high-speed
oscillation clock.
<4> Set the start of oscillation of the X1 or XT1 clock via software (refer to (1) in 5.6.1 Example of controlling high-
speed system clock and (1) in 5.6.3 Example of controlling subsystem clock).
<5> When switching the CPU clock to the X1 or XT1 clock, wait for the clock oscillation to stabilize, and then set
switching via software (refer to (3) in 5.6.1 Example of controlling high-speed system clock and (3) in 5.6.3
Example of controlling subsystem clock).