Datasheet

78K0/Kx2-L CHAPTER 5 CLOCK GENERATOR

R01UH0028EJ0400 Rev.4.00 212

Sep 27, 2010

(9) Peripheral enable register 0 (PER0)

Note

This register controls the clock supplied to peripheral functions other than the real-time counter. By stopping the clock

supplied to such peripheral functions, the power consumption can be reduced.

PER0 can be set by a 1-bit or 8-bit memory manipulation instruction.

Reset signal generation clears this register to 00H.

Note 78K0/KC2-L only

Figure 5-12. Format of Peripheral Enable Register 0 (PER0)

Address: FF25H After reset: 00H R/W

Symbol <7> 6 5 4 3 2 1 0

PER0 RTCEN 0 0 0 0 0 0 0

RTCEN Control of real-time counter (RTC) input clock supply

0 Sub HALT low power consumption mode

Sub HALT normal mode

Note

Note To output the subsystem clock by using the PCL function while in the subsystem clock HALT mode,

set RTCEN to 1.

Caution Be sure to clear bits 0 to 6 of PER0 to “0”.

<R>