Datasheet
78K0/Kx2-L CHAPTER 4 PORT FUNCTIONS
R01UH0028EJ0400 Rev.4.00 195
Sep 27, 2010
Table 4-18. Settings of Port Mode Register and Output Latch When Using Alternate Function
(78K0/KC2-L) (2/3)
Alternate Function Pin Name
Function Name I/O
MUXSEL PM×× P××
ANI0
Note 1
Input
−
1
×
P20
AMP0-
Notes 1, 2
Input
−
1
×
ANI1
Note 1
Input
−
1
×
AMP0OUT
Notes 1, 2
Output
−
1
×
P21
PGAIN
Notes 1, 2
Input
−
1
×
ANI2
Note 1
Input
−
1
×
P22
AMP0+
Notes 1, 2
Input
−
1
×
P23 to P26,
P27
Note 3
ANI3 to ANI6
Note 1
, ANI7
Notes 1, 3
Input
−
1
×
P30 INTP1 Input
−
1
×
INTP2 Input
−
1
×
P31
TOOLC1 Input
− × ×
INTP3 Input
−
1
×
P32
TOOLD1 I/O
− × ×
INTP4 Input
−
1
×
TI51 Input
−
1
×
P33
TO51 Output
−
0 0
RTCCL
Note 3
Output
−
0 0
RTCDIV
Note 3
Output
−
0 0
Input CSISEL = 1 1
×
P40
Note 3
(SCK11)
Note 3
Output CSISEL = 1 0 1
RTC1HZ
Note 3
Output
−
0 0 P41
Note 3
(SI11)
Note 3
Input CSISEL = 1 1
×
PCL
Note 4
Output
−
0 0
SSI11
Note 4
Input
−
1
×
P42
Note 4
INTP6
Note 4
Input
−
1
×
SCLA0
Notes 5, 6
I/O
−
0 1
Input CSISEL = 0 1
×
SCK11
Output CSISEL = 0 0 1
P60
INTP11 Input
−
1
×
Notes 1. The pin function can be selected by using ADPC0 register, PM2 register, ADS register, OPAMP0E bit, and
PGAIN bit. Refer to Tables 4-10 to 4-12 of 4.2.3 Port 2.
2.
μ
PD78F0586, 78F0587, 78F0588 (products with operational amplifier) only
3. 44-pin and 48-pin products only
4. 48-pin products only
5. During I
2
C communication, set SCLA0 and SDAA0 to N-ch open drain output (VDD tolerance) mode by using
POM6 register (refer to 4.3 (5) Port output mode register 6 (POM6)).
6. When using an input compliant with the SMBus specifications in I
2
C communication, select the SMBus input
buffer by using PIM6 register (refer to 4.3 (4) Port input mode register 6 (PIM6)).
Remarks 1. ×: Don’t care
PM××: Port mode register
P××: Port output latch
2. Functions in parentheses ( ) can be assigned by setting MUXSEL register.
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