Datasheet
78K0/Kx2-L CHAPTER 4 PORT FUNCTIONS
R01UH0028EJ0400 Rev.4.00 192
Sep 27, 2010
Table 4-17. Settings of Port Mode Register and Output Latch When Using Alternate Function
(78K0/KB2-L) (1/2)
Alternate Function Pin Name
Function Name I/O
PM×× P××
P00 TI000 Input 1
×
TI010 Input 1
×
P01
TO00 Output 0 0
ANI8
Note 2
Input 1
×
AMP1-
Notes 1, 2
Input 1
×
Input 1
×
P10
SCK10
Output 0 1
ANI9
Note 2
Input 1
×
AMP1OUT
Notes 1, 2
Output 1
×
P11
SI10 Input 1
×
ANI10
Note 2
Input 1
×
AMP1+
Notes 1, 2
Input 1
×
P12
SI10 Output 0 0
P13 TxD6 Output 0 1
P14 RxD6 Input 1
×
P15 TOH0 Output 0 0
TOH1 Output 0 0 P16
INTP5 Input 1
×
TI50 Input 1
×
P17
TO50 Output 0 0
ANI0
Note 3
Input 1
×
P20
AMP0-
Notes 1, 3
Input 1
×
ANI1
Note 3
Input 1
×
AMP0OUT
Notes 1, 3
Output 1
×
P21
PGAIN
Notes 1, 3
Input 1
×
ANI2
Note 3
Input 1
×
P22
AMP0+
Notes 1, 3
Input 1
×
P23 ANI3
Note 3
Input 1
×
Notes 1
μ
PD78F0576, 78F0577, 78F0578 (products with operational amplifier) only
2. The pin function can be selected by using ADPC1 register, PM1 register, ADS register, and OPAMP1E bit.
Refer to Tables 4-8 and 4-9 of 4.2.2 Port 1.
3. The pin function can be selected by using ADPC0 register, PM2 register, ADS register, OPAMP0E bit, and
PGAIN bit. Refer to Tables 4-10 to 4-12 of 4.2.3 Port 2.
Remark ×: Don’t care
PM××: Port mode register
P××: Port output latch