Datasheet

78K0/Kx2-L CHAPTER 4 PORT FUNCTIONS
R01UH0028EJ0400 Rev.4.00 191
Sep 27, 2010
Table 4-16. Settings of Port Mode Register and Output Latch When Using Alternate Function
(78K0/KA2-L (25-pin and 32-pin products)) (2/2)
Alternate Function Pin Name
Function Name I/O
MUXSEL PM×× P××
SCLA0
Notes 1, 2
I/O
0 1 P60
TxD6
Note 3
Output
0 1
SDAA0
Notes 1, 2
I/O
0 1 P61
RxD6 Input
1
×
P70 to P72
Note 4
ANI8 to ANI10
Notes 4, 5
Input
1
×
X1
Note 6
× ×
TOOLC0 Input
× ×
(TI000) Input TM00SEL1
Note 4
,
TM00SEL0 = 0, 1
× ×
P121
(INTP0) Input INTP0SEL1
Note 4
,
INTP0SEL0 = 0, 1
× ×
X2
Note 6
× ×
EXCLK
Note 6
Input
× ×
P122
TOOLD0 I/O
× ×
RESET
Note 7
Input
× ×
(TI000)
Note 4
Input TM00SEL1,
TM00SEL0 = 1, 0
× ×
P125
(INTP0)
Note 4
Input INTP0SEL1,
INTP0SEL0 = 1, 0
× ×
Notes 1. During I
2
C communication, set SCLA0 and SDAA0 to N-ch open drain output (VDD tolerance) mode by using
POM6 register (refer to 4.3 (5) Port output mode register 6 (POM6)).
2. When using an input compliant with the SMBus specifications in I
2
C communication, select the SMBus input
buffer by using PIM6 register (refer to 4.3 (4) Port input mode register 6 (PIM6)).
3. During UART communication, set TxD6 to normal output (CMOS output) mode by using POM6 register
(refer to 4.3 (5) Port output mode register 6 (POM6)).
4. 32-pin products only
5. The pin function can be selected by using ADPC1 register, PM7 register, and ADS register. Refer to Table
4-13 of 4.2.7 Port 7.
6. When using the P121 and P122 pins to connect a resonator for the main system clock (X1, X2) or to input an
external clock for the main system clock (EXCLK), the X1 oscillation mode or external clock input mode must
be set by using OSCCTL register (for details, refer to 5.3 (1) Clock operation mode select register
(OSCCTL)). The reset value of OSCCTL is 00H (both P121 and P122 are input port pins).
7. Clear RSTM bit (bit 5 of RSTMASK register) to 0 when using P125 as an external reset input (RESET).
Remarks 1. ×: Don’t care
PM××: Port mode register
P××: Port output latch
2. Functions in parentheses ( ) can be assigned by setting MUXSEL register.
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