Datasheet

78K0/Kx2-L CHAPTER 4 PORT FUNCTIONS
R01UH0028EJ0400 Rev.4.00 187
Sep 27, 2010
Table 4-14. Settings of Port Mode Register and Output Latch When Using Alternate Function
(78K0/KY2-L) (2/2)
Alternate Function Pin Name
Function Name I/O
PM×× P××
X1
Note 1
− × ×
P121
TOOLC0 Input
× ×
X2
Note 1
− × ×
EXCLK
Note 1
Input
× ×
P122
TOOLD0 I/O
× ×
P125 RESET
Note 2
Input
× ×
Notes 1. When using the P121 and P122 pins to connect a resonator for the main system clock (X1, X2) or to input an
external clock for the main system clock (EXCLK), the X1 oscillation mode or external clock input mode must
be set by using OSCCTL register (for details, refer to 5.3 (1) Clock operation mode select register
(OSCCTL)). The reset value of OSCCTL is 00H (both P121 and P122 are input port pins).
2. Clear RSTM bit (bit 5 of RSTMASK register) to 0 when using P125 as an external reset input (RESET).
Remark ×: Don’t care
PM××: Port mode register
P××: Port output latch