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78K0/Kx2-L CHAPTER 4 PORT FUNCTIONS

R01UH0028EJ0400 Rev.4.00 186

Sep 27, 2010

4.5 Settings of Port Mode Register and Output Latch When Using Alternate Function

To use the alternate function of a port pin, set the port mode register and output latch as shown in Tables 4-14 to 4-18.

Table 4-14. Settings of Port Mode Register and Output Latch When Using Alternate Function

(78K0/KY2-L) (1/2)

Alternate Function Pin Name

Function Name I/O

PM×× P××

TI000 Input 1

P00

INTP0 Input 1

TI010 Input 1

P01

TO00 Output 0 0

ANI0

Note 1

Input 1

P20

AMP0-

Notes 1, 2

Input 1

ANI1

Note 1

Input 1

AMP0OUT

Notes 1, 2

Output 1

P21

PGAIN

Notes 1, 2

Input 1

ANI2

Note 1

Input 1

P22

AMP0+

Notes 1, 2

Input 1

P23 ANI3

Note 1

Input 1

INTP1 Input 1

TI51 Input 1

P30

TOH1 Output 0 0

SCLA0

Notes 3, 4

I/O 0 1 P60

TxD6

Note 5

Output 0 1

SDAA0

Notes 3, 4

I/O 0 1 P61

RxD6 Input 1

Notes 1. The pin function can be selected by using ADPC0 register, PM2 register, ADS register, OPAMP0E bit, and

PGAIN bit. Refer to Tables 4-10 to 4-12 of 4.2.3 Port 2.

PD78F0555, 78F0556, 78F0557 (products with operational amplifier) only

3. During I

C communication, set SCLA0 and SDAA0 to N-ch open drain output (VDD tolerance) mode by using

POM6 register (refer to 4.3 (5) Port output mode register 6 (POM6)).

4. When using an input compliant with the SMBus specifications in I

C communication, select the SMBus input

buffer by using PIM6 register (refer to 4.3 (4) Port input mode register 6 (PIM6)).

5. During UART communication, set TxD6 to normal output (CMOS output) mode by using POM6 register