Datasheet

78K0/Kx2-L CHAPTER 4 PORT FUNCTIONS
R01UH0028EJ0400 Rev.4.00 179
Sep 27, 2010
Figure 4-44. Format of Pull-up Resistor Option Register (78K0/KC2-L)
7
0
Symbol
PU0
6
0
5
0
4
0
3
0
2
PU02
Note 1
1
PU01
0
PU00
Address
FF30H
After reset
00H
R/W
R/W
PU17
PU1
PU16 PU15 PU14 PU13 PU12 PU11 PU10
FF31H 00H R/W
0
PU3
0 0 0 PU33 PU32 PU31 PU30
FF33H 00H R/W
0
PU4
Note 2
0 0 0 0 PU42
Note 1
PU41
Note 2
PU40
Note 2
FF34H 00H R/W
0
PU6
0 0 0 PU63
Note 2
PU62 PU61 PU60
FF36H 00H R/W
0
PU7
0 PU75
Note 1
PU74
Note 1
PU73 PU72 PU71 PU70
FF37H 00H R/W
0
PU12
0 PU125 0 0 0 0 PU120
FF3CH 20H R/W
PUmn
Pmn pin on-chip pull-up resistor selection
(m = 0, 1, 3, 4, 6, 7, 12; n = 0 to 7)
0 On-chip pull-up resistor not connected
1 On-chip pull-up resistor connected
Notes 1. 48-pin products only
2. 44-pin and 48-pin products only
(4) Port input mode register 6 (PIM6)
This register sets the input buffer of P60 and P61 in 1-bit units.
When using an input compliant with the SMBus specifications in I
2
C communication, set PIM60 and PIM61 to 1.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 4-45. Format of Port Input Mode Register 6 (PIM6)
Address: FF3EH After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
PIM6 0 0 0 0 0 0 PIM61 PIM60
PIM6n P6n pin input buffer selection (n = 0, 1)
0 Normal input (Schmitt) buffer
1 SMBus input buffer
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