Datasheet

78K0/Kx2-L CHAPTER 4 PORT FUNCTIONS
R01UH0028EJ0400 Rev.4.00 174
Sep 27, 2010
Figure 4-37. Format of Port Register (78K0/KA2-L (25-pin and 32-pin products))
7
0
Symbol
P0
6
0
5
0
4
0
3
0
2
P02
1
P01
Note 2
0
P00
Note 1
Address
FF00H
After reset
00H (output latch)
R/W
R/W
R/W
P37
P3
P36 P35 P34 P33 P32 P31 0
FF00H 00H (output latch)
R/W
P27
Note 2, 3
P2
P26
Note 3
P25
Note 3
P24
Note 3
P23
Note 3
P22
Note 3
P21
Note 3
P20
Note 3
FF02H 00H (output latch)
0
P6
0 0 0 0 0 P61 P60
FF00H 00H (output latch) R/W
0
P7
Note 2
0000 P72
Note 2, 3
P71
Note 2, 3
P70
Note 2, 3
FF07H 00H (output latch) R/W
0
P12
0 P125 0 0 0 FF0CH 00H R P122
Note 4
P121
Note 4
m = 0, 2, 3, 6, 7, 12; n = 0 to 7
Pmn
Output data control (in output mode) Input data read (in input mode)
0 Output 0 Input low level
1 Output 1 Input high level
Notes 1. 25-pin products only
2. 32-pin products only
3. If this pin is set as an analog input and to input mode, do not access the output latch.
4. “0” is always read from the output latch of the pin in the X1 oscillation mode or external clock input
mode.
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