Datasheet

78K0/Kx2-L CHAPTER 4 PORT FUNCTIONS
R01UH0028EJ0400 Rev.4.00 160
Sep 27, 2010
4.2.7 Port 7
78K0/KY2-L
(
μ PD78F057x)
78K0/KA2-L
( μ PD78F056x)
78K0/KB2-L
( μ PD78F057x)
78K0/KC2-L
( μ PD78F058x)
16 Pins 20, 25 Pins 32 Pins 30 Pins 40, 44 Pins 48 Pins
− −
P70/ANI8
−
P70/KR0 P70/KR0
− −
P71/ANI9
−
P71/KR1 P71/KR1
− −
P72/ANI10
−
P72/KR2 P72/KR2
− − − −
P73/KR3 P73/KR3
− − − − −
P74/KR4
− − − − −
P75/KR5
Port 7 is an I/O port with an output latch. Port 7 can be set to the input mode or output mode in 1-bit units using port
mode register 7 (PM7). When the P70 to P75 pins are used as an input port, use of an on-chip pull-up resistor can be
specified in 1-bit units by pull-up resistor option register 7 (PU7) in 78K0/KC2-L.
This port can also be used for A/D converter analog input and key interrupt input pins.
When using P70/ANI8 to P72/ANI10, set the registers according to the pin function to be used (refer to Tables 4-13).
Table 4-13. Setting Functions of P70/ANI8 to P72/ANI10 Pins
ADPC1 register PM7 register ADS register
(n = 8 to 10)
P70/ANI8 to P72/ANI10
Pins
Selects ANIn. Setting prohibited
Input mode
Does not select ANIn. Digital input
Selects ANIn. Setting prohibited
Digital I/O selection
Output mode
Does not select ANIn. Digital output
Selects ANIn.
Analog input (to be
converted into digital
signals)
Input mode
Does not select ANIn.
Analog input (not to be
converted into digital
signals)
Analog input selection
Output mode
−
Setting prohibited
Remark ADPC1: A/D port configuration register 1
PM7: Port mode register 7
ADS: Analog input channel specification register
Reset signal generation sets port 7 to input mode.
Figure 4-26 shows a block diagram of port 7.
<R>
<R>
<R>