Datasheet
78K0/Kx2-L CHAPTER 4 PORT FUNCTIONS
R01UH0028EJ0400 Rev.4.00 142
Sep 27, 2010
Table 4-11. Setting Functions of P21/ANI1/AMP0OUT/PGAIN Pin
ADPC0
Register
PM2 Register
OPAMP0E
bit
PGAEN
bit
ADS Register P21/ANI1/AMP0OUT/PGAIN Pin
Selects ANI1. Setting prohibited 0
−
Does not select ANI1. Digital input
Input mode
1
− −
Setting prohibited
Selects ANI1. Setting prohibited 0
−
Does not select ANI1. Digital output
Digital I/O
selection
Output mode
1
− −
Setting prohibited
Selects ANI1.
Analog input (to be converted into digital
signals)
0 0
Does not select ANI1.
Analog input (not to be converted into
digital signals)
Selects PGAOUT.
PGA input (PGA output is converted into
digital signals)
Selects ANI1.
PGA input (to be converted into digital
signals)
0 1
Does not select
PGAOUT and ANI1.
PGA input (not to be converted into digital
signals)
Selects ANI1.
Operational amplifier 0 output (to be
converted into digital signals)
1 0
Does not select ANI1.
Operational amplifier 0 output (not to be
converted into digital signals)
Selects PGAOUT.
Operational amplifier 0 output and PGA
input (PGA output is converted into digital
signals)
Selects ANI1.
Operational amplifier 0 output (to be
converted into digital signals)
Input mode
1 1
Does not select
PGAOUT and ANI1.
Operational amplifier 0 output (not to be
converted into digital signals)
Analog I/O
selection
Output mode
− −
Setting prohibited
Table 4-12. Setting Functions of P23/ANI3 to P27/ANI7 Pins
ADPC0 Register PM2 Register ADS Register(n = 3 to 7) P23/ANI3 to P27/ANI7 Pins
Selects ANIn. Setting prohibited Input mode
Does not select ANIn. Digital input
Selects ANIn. Setting prohibited
Digital I/O
selection
Output mode
Does not select ANIn. Digital output
Selects ANIn.
Analog input (to be converted into
digital signals)
Input mode
Does not select ANIn.
Analog input (not to be converted
into digital signals)
Analog input
selection
Output mode
−
Setting prohibited
Remark ADPC0: A/D port configuration register 0
PM2: Port mode register 2
OPAMP0E: Bit 7 of operational amplifier 0 control register (AMP0M)
PGAEN: Bit 6 of AMP0M
ADS: Analog input channel specification register
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