Datasheet
78K0/Kx2-L CHAPTER 4 PORT FUNCTIONS
R01UH0028EJ0400 Rev.4.00 141
Sep 27, 2010
4.2.3 Port 2
78K0/KY2-L
(
μ
PD78F055x)
78K0/KA2-L
(
μ
PD78F056x)
78K0/KB2-L
(
μ
PD78F057x)
78K0/KC2-L
(
μ
PD78F058x)
16 Pins 20 Pins 25 Pins 32 Pins 30 Pins 40 Pins 44 Pins 48 Pins
P20/ANI0/
AMP0-
Note
P20/ANI0/
AMP0-
Note
P20/ANI0/
AMP0-
Note
P20/ANI0/
AMP0-
Note
P20/ANI0/
AMP0-
Note
P20/ANI0/
AMP0-
Note
P20/ANI0/
AMP0-
Note
P20/ANI0/
AMP0-
Note
P21/ANI1/
AMP0OUT
Note
/
PGAIN
Note
P21/ANI1/
AMP0OUT
Note
/
PGAIN
Note
P21/ANI1/
AMP0OUT
Note
/
PGAIN
Note
P21/ANI1/
AMP0OUT
Note
/
PGAIN
Note
P21/ANI1/
AMP0OUT
Note
/
PGAIN
Note
P21/ANI1/
AMP0OUT
Note
/
PGAIN
Note
P21/ANI1/
AMP0OUT
Note
/
PGAIN
Note
P21/ANI1/
AMP0OUT
Note
/
PGAIN
Note
P22/ANI2/
AMP0+
Note
P22/ANI2/
AMP0+
Note
P22/ANI2/
AMP0+
Note
P22/ANI2/
AMP0+
Note
P22/ANI2/
AMP0+
Note
P22/ANI2/
AMP0+
Note
P22/ANI2/
AMP0+
Note
P22/ANI2/
AMP0+
Note
P23/ANI3 P23/ANI3 P23/ANI3 P23/ANI3 P23/ANI3 P23/ANI3 P23/ANI3 P23/ANI3
−
P24/ANI4 P24/ANI4 P24/ANI4
−
P24/ANI4 P24/ANI4 P24/ANI4
−
P25/ANI5 P25/ANI5 P25/ANI5
−
P25/ANI5 P25/ANI5 P25/ANI5
− −
P26/ANI6 P26/ANI6
−
P26/ANI6 P26/ANI6 P26/ANI6
− − −
P27/ANI7
− −
P27/ANI7 P27/ANI7
Note Products with operational amplifier only
Port 2 is an I/O port with an output latch. Port 2 can be set to the input mode or output mode in 1-bit units using port
mode register 2 (PM2).
This port can also be used for A/D converter analog input, operational amplifier I/O, and PGA (Programmable Gain
Amplifier) input.
When using P20/AMP0-/ANI0 to P27/ANI7, set the registers according to the pin function to be used (refer to Tables 4-
10 to 4-12).
To use P20/AMP0-/ANI0 to P27/ANI7 as a digital input or a digital output, it is recommended to select a pin to use
starting with the furthest pin from AV
REF (for example, the P20/AMP0-/ANI0 pin in the 78K0/KC2-L). To use P20/AMP0-
/ANI0 to P27/ANI7 as an analog input, it is recommended to select a pin to use starting with the closest pin to AV
SS (for
example, the P27/ANI7 pin in the 78K0/KC2-L (44-pin and 48-pin products)).
Table 4-10. Setting Functions of P20/ANI0/AMP0-, P22/ANI2/AMP0+ Pins
ADPC0 Register PM2 Register OPAMP0E bit
ADS Register
(n = 0, 2)
P20/ANI0/AMP0-,
P22/ANI2/AMP0+ Pins
Selects ANIn. Setting prohibited Input mode
−
Does not select ANIn. Digital input
Selects ANIn. Setting prohibited
Digital I/O
selection
Output mode
−
Does not select ANIn. Digital output
Selects ANIn.
Analog input (to be converted into
digital signals)
0
Does not select ANIn.
Analog input (not to be converted
into digital signals)
Selects ANIn. Setting prohibited
Input mode
1
Does not select ANIn. Operational amplifier 0 input
Analog input
selection
Output mode
− −
Setting prohibited
Remark ADPC0: A/D port configuration register 0
PM2: Port mode register 2
OPAMP0E: Bit 7 of operational amplifier 0 control register (AMP0M)
ADS: Analog input channel specification register
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