Datasheet

78K0/Kx2-L CHAPTER 3 CPU ARCHITECTURE
R01UH0028EJ0400 Rev.4.00 97
Sep 27, 2010
Table 3-9. Special Function Register List: 78K0/KB2-L (3/5)
Bit No.
Number of Bits
Manipulated
Simultaneously
Address Symbol
7 6 5 4 3 2 1 0
R/W
1 8 16
After
Reset
Reference
page
FF4CH to
FF4EH
FF4FH ISC 0 0 0 0 0 0 ISC1 ISC0 R/W
00H 463
FF50H ASIM6
<POWE
R6>
<TXE6> <RXE6>
PS61 PS60 CL6 SL6 ISRM6 R/W
01H 454
FF51H
FF52H
FF53H ASIS6 0 0 0 0 0 PE6 FE6 OVE6 R
00H 457
FF54H
FF55H ASIF6 0 0 0 0 0 0 TXBF6 TXSF6 R
00H 458
FF56H CKSR6 0 0 0 0 TPS63 TPS62 TPS61 TPS60 R/W
00H 458
FF57H BRGC6 MDL67 MDL66 MDL65 MDL64 MDL63 MDL62 MDL61 MDL60 R/W
FFH 460
FF58H ASICL6
<SBRF6> <SBRT6>
SBTT6 SBL62 SBL61 SBL60 DIR6
TXDLV6
R/W
16H 461
FF59H to
FF5FH
FF60H
AMP0M
Note
<OPA
MP0E>
<PGAE
N>
0 0 0 0
AMP0
VG1
AMP0
VG0
R/W
00H 436
FF61H
AMP1M
Note
<OPA
MP1E>
0 0 0 0 0 0 0 R/W
00H 436
FF62H to
FF68H
FF69H TMHMD0
<TMH
E0>
CKS02 CKS01 CKS00
TMMD
01
TMMD
00
<TOLE
V0>
<TOEN
0>
R/W
00H 339
FF6AH TCL50 0 0 0 0 0 TCL502 TCL501 TCL500 R/W
00H 318
FF6BH TMC50
<TCE
50>
TMC
506
0 0
<LVS
50>
<LVR
50>
TMC
501
<TOE
50>
R/W
00H 320
FF6CH TMHMD1
<TMH
E1>
CKS12 CKS11 CKS10
TMMD
11
TMMD
10
<TOLE
V1>
<TOE
N1>
R/W
00H 339
FF6DH TMCYC1 0 0 0 0 0
RMC1 NRZB1 <NRZ1>
R/W
00H 343
FF6EH to
FF7FH
FF80H CSIM10
<CSIE
10>
TRMD
10
0 DIR10 0 0 0 CSOT10 R/W
00H 566
FF81H CSIC10 0 0 0 CKP10 DAP10 CKS102 CKS101 CKS100 R/W
00H 569
FF82H
FF83H
FF84H SOTB10
R/W
00H 565
Note These registers are incorporated only in products with operational amplifier.
Remark For a bit name enclosed in angle brackets (<>), the bit name is defined as a reserved word in the RA78K0,
and is defined as an sfr variable using the #pragma sfr directive in the CC78K0.