Datasheet

78K0/Kx2-L CHAPTER 3 CPU ARCHITECTURE
R01UH0028EJ0400 Rev.4.00 92
Sep 27, 2010
Table 3-8. Special Function Register List: 78K0/KA2-L (25-pin and 32-pin products) (3/5)
Bit No.
Number of Bits
Manipulated
Simultaneously
Address Symbol
7 6 5 4 3 2 1 0
R/W
1 8 16
After
Reset
Reference
page
FF42H
FF43H TMC51
<TCE51>
0 0 0 0 0 0 0 R/W
00H 320
FF44H to
FF47H
FF48H EGPCTL0 0 0 EGP5 EGP4 EGP3 EGP2 0 EGP0 R/W
00H
619
FF49H EGNCTL0 0 0 EGN5 EGN4 EGN3 EGN2 0 EGN0 R/W
00H
619
FF4AH to
FF4EH
FF4FH ISC 0 0 0 0 0 0 ISC1 ISC0 R/W
00H
463
FF50H ASIM6
<POWE
R6>
<TXE6> <RXE6>
PS61 PS60 CL6 SL6 ISRM6 R/W
01H
454
FF51H
FF52H
FF53H ASIS6 0 0 0 0 0 PE6 FE6 OVE6 R
00H
457
FF54H
FF55H ASIF6 0 0 0 0 0 0 TXBF6 TXSF6 R
00H
458
FF56H CKSR6 0 0 0 0 TPS63 TPS62 TPS61 TPS60 R/W
00H
458
FF57H BRGC6 MDL67 MDL66 MDL65 MDL64 MDL63 MDL62 MDL61 MDL60 R/W
FFH
460
FF58H ASICL6
<SBRF6> <SBRT6>
SBTT6 SBL62 SBL61 SBL60 DIR6
TXDLV6
R/W
16H
461
FF59H to
FF5FH
FF60H
AMP0M
Note 1
<OPA
MP0E>
<PGAE
N>
0 0 0 0
<AMP0
VG1>
<AMP0
VG0>
R/W
00H
436
FF61H to
FF6BH
FF6CH TMHMD1
<TMH
E1>
CKS12 CKS11 CKS10
TMMD
11
TMMD
10
<TOLE
V1>
<TOE
N1>
R/W
00H
339
FF6DH TMCYC1 0 0 0 0 0
RMC1 NRZB1 <NRZ1>
R/W
00H
343
FF6EH to
FF7BH
FF7CH SOTB11
R/W
00H
565
FF7DH to
FF87H
FF88H CSIM11
<CSIE
11>
TRMD
11
SSE11 DIR11 0 0 0
CSOT
11
R/W
00H
566
FF89H CSIC11
0 0 0
CKP11 DAP11
CKS10
2
CKS10
1
CKS10
0
R/W
00H
569
FF8AH to
FF8BH
FF8CH TCL51
0
0 0 0 0
TCL512 TCL511 TCL510 R/W
00H
318
Notes 1. This bit is incorporated only in products with operational amplifier y
2. The reset value of WDTE is determined by setting of option byte.
Remark For a bit name enclosed in angle brackets (<>), the bit name is defined as a reserved word in the RA78K0, and is
defined as an sfr variable using the #pragma sfr directive in the CC78K0.
<R>