Datasheet

78K0/Kx2-L CHAPTER 3 CPU ARCHITECTURE
R01UH0028EJ0400 Rev.4.00 91
Sep 27, 2010
Table 3-8. Special Function Register List: 78K0/KA2-L (25-pin and 32-pin products) (2/5)
Bit No.
Number of Bits
Manipulated
Simultaneously
Address Symbol
7 6 5 4 3 2 1 0
R/W
1 8 16
After
Reset
Reference
page
FF23H PM3 PM37 PM36 PM35 PM34 PM33 PM32 PM31 1 R/W
FFH
167, 324,
345
FF24H
FF25H
FF26H PM6 1 1 1 1 1 1 PM61 PM60 R/W
FFH
167, 463,
504, 573
FF27H
P7
Note2
1 1 1 1 1
P72
Note 2
P71
Note 2
P70
Note 2
R/W
00H 167
FF28H ADM0
<ADCS>
0 FR2 FR1 FR0 LV1 LV0
<ADCE>
R/W
00H 405
FF29H
FF2AH POM6 0 0 0 0 0 0 POM61 POM60 R/W
00H
180, 464,
504
FF2BH FPCTL 0 0 0 0 0 0 0
<FLMD
PUP>
R/W
00H 713
FF2CH
FF2DH RSTMASK 0 0 RSTM 0 0 0 0 0 R/W
00H 180
FF2EH ADPC0
ADPCS7
Note 2
ADPCS6 ADPCS5 ADPCS4 ADPCS3 ADPCS2 ADPCS1 ADPCS0
R/W
00H
FF2FH
ADPC1
Note 2
0 0 0 0 0
ADPCS10
Note 2
ADPCS9
Note 2
ADPCS8
Note 2
R/W
00H
181, 413,
437
FF30H PU0 0 0 0 0 0 PU02
PU01
Note 2
PU00
Note 1
R/W
00H 177
FF31H
FF32H
FF33H PU3 PU37 PU36 PU35 PU34 PU33 PU32 PU31 0 R/W 00H 177
FF34H
FF35H
FF36H PU6 0 0 0 0 0 0 PU61 PU60 R/W 00H 177
FF37H
FF38H
FF39H MUXSEL
<INTP0SE
L1>
Note 2
<INTP0
SEL0>
<TM00SE
L1>
Note 2
<TM00
SEL0>
<TM5SEL
1>
Note 1
<TM5SEL
0>
Note 1
<TMHSEL
1>
Note 1
<TMHSE
L0>
R/W
00H 183, 572
FF3AH
FF3BH
FF3CH PU12 0 0 PU125 0 0 0 0 0 R/W 20H 177
FF3DH RMC R/W 00H 691
FF3EH PIM6 0 0 0 0 0 0 PIM61 PIM60 R/W 00H 179, 503
FF3FH
FF40H
FF41H CR51 R/W 00H 317
Notes 1. 25-pin products only
2. 32-pin products only
3. This bit is incorporated only in products with operational amplifier.
Remark For a bit name enclosed in angle brackets (<>), the bit name is defined as a reserved word in the RA78K0, and
is defined as an sfr variable using the #pragma sfr directive in the CC78K0.
<R>