Datasheet

CHAPTER 3 CPU ARCHITECTURE
User’s Manual U18698EJ1V0UD
51
Figure 3-6. Correspondence Between Data Memory and Addressing ( μ PD78F0401, 78F0411)
SFR addressing
Direct addressing
Register indirect addressing
Based addressing
Based indexed addressing
Special function registers
(SFR)
256 x 8 bits
Internal high-speed RAM
768 x 8 bits
General-purpose
registers
32 x 8 bits
Reserved
Flash memory
16384 x 8 bits
FFFFH
FF00H
FEFFH
FEE0H
FEDFH
4000H
3FFFH
0000H
FF20H
FF1FH
FE20H
FE1FH
Register addressing
Short direct
addressing
FA56H
FA55H
LCD display RAM
22 × 8 bits
FA40H
FA3FH
FC00H
FBFFH
Reserved