Datasheet

CHAPTER 22 LOW-VOLTAGE DETECTOR
User’s Manual U18698EJ1V0UD
501
Figure 22-9. Example of Software Processing After Reset Release (1/2)
• If supply voltage fluctuation is 50 ms or less in vicinity of LVI detection voltage
; Check the reset source
Note
Initialize the port.
Reset
Initialization
processing <1>
50 ms have passed?
(TMIFH1 = 1?)
Initialization
processing <2>
Setting 8-bit timer H1
(to measure 50 ms)
; Setting of division ratio of system clock,
such as setting of timer or A/D converter
Yes
No
Clearing WDT
Detection
voltage or higher
(LVIF = 0?)
Yes
Restarting timer H1
(TMHE1 = 0 → TMHE1 = 1)
No
; The timer counter is cleared and the timer is started.
LVI reset
;f
PRS = Internal high-speed oscillation clock (8.4 MHz (MAX.)) (defau
lt)
Source: f PRS (8.4 MHz (MAX.))/2
12
,
Where comparison value = 102: ≅ 50 ms
Timer starts (TMHE1 = 1).
Note A flowchart is shown on the next page.