Datasheet

CHAPTER 20 RESET FUNCTION
User’s Manual U18698EJ1V0UD
473
Figure 20-4. Timing of Reset in STOP Mode by RESET Input
Delay
Normal
operation
CPU clock
Reset period
(oscillation stop)
RESET
Internal reset signal
STOP instruction execution
Stop status
(oscillation stop)
High-speed system clock
(when X1 oscillation is selected)
Internal high-speed
oscillation clock
Hi-Z
Port pin
Starting X1 oscillation is specified by software.
Normal operation
(internal high-speed oscillation clock)
Reset
processing
(11 to 47 s)
Delay
(5 s (TYP.))
μ
μ
Wait for oscillation
accuracy stabilization
(86 to 361 s)
μ
Remark For the reset timing of the power-on-clear circuit and low-voltage detector, see CHAPTER 21 POWER-
ON-CLEAR CIRCUIT and CHAPTER 22 LOW-VOLTAGE DETECTOR.