Datasheet

CHAPTER 17 INTERRUPT FUNCTIONS
User’s Manual U18698EJ1V0UD
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(2) Interrupt mask flag registers (MK0L, MK0H, MK1L, MK1H)
The interrupt mask flags are used to enable/disable the corresponding maskable interrupt servicing.
MK0L, MK0H, MK1L, and MK1H are set by a 1-bit or 8-bit memory manipulation instruction. When MK0L and
MK0H, and MK1L and MK1H are combined to form 16-bit registers MK0 and MK1, they are set by a 16-bit
memory manipulation instruction.
Reset signal generation sets these registers to FFH.
Figure 17-3. Format of Interrupt Mask Flag Registers (MK0L, MK0H, MK1L, MK1H)
Address: FFE4H After reset: FFH R/W
Symbol <7> 6 5 <4> <3> <2> <1> <0>
MK0L SREMK6 1 1 PMK3 PMK2 PMK1 PMK0 LVIMK
Address: FFE5H After reset: FFH R/W
Symbol <7> <6> <5> <4> <3> <2> <1> <0>
MK0H TMMK010 TMMK000 TMMK50 TMMKH0 TMMKH1 STMK0 STMK6 SRMK6
Address: FFE6H After reset: FFH R/W
Symbol <7> 6 <5> <4> <3> <2> <1> <0>
MK1L TMMK52 1 RTCMK KRMK TMMK51 RTCIMK SRMK0 ADMK
Note
Address: FFE7H After reset: FFH R/W
Symbol 7 6 5 4 3 2 <1> <0>
MK1H 1 1 1 1 1 1 MCGMK TMHMK2
XXMKX Interrupt servicing control
0 Interrupt servicing enabled
1 Interrupt servicing disabled
Note
μ PD78F041x only.
Caution Be sure to set bits 5 and 6 of MK0L, bit 6 of MK1L, and bits 2 to 7 of MK1H to 1.