Datasheet
CHAPTER 16 MANCHESTER CODE GENERATOR
User’s Manual U18698EJ1V0UD
411
Figure 16-1. Block Diagram of Manchester Code Generator
INTMCG
MCGO/P32/TOH0
f
PRS
to f
PRS
/2
5
Internal bus
Control
8-bit shift register
Output
control
3-bit
counter
Selector
MC0CTL1 MC0CTL2
BRG
MC0BIT MC0TX MC0STR MC0CTL0
P32 PM32
Remark BRG: Baud rate generator
f
PRS: Peripheral hardware clock frequency
MC0BIT: MCG transmit bit count specification register
MC0CTL2 to MC0CTL0: MCG control registers 2 to 0
MC0STR: MCG status register
MC0TX: MCG transmit buffer register
Figure 16-2. Block Diagram of Baud Rate Generator
Selector
MC0CTL1:
MC0CKS2-
MC0CKS0
MC0CTL2:
MC0BRS4-
MC0BRS0
1/2 Baud rate
5-bit counterf
PRS
to f
PRS
/2
5
Remark f
PRS: Peripheral hardware clock frequency
MC0CTL2, MC0CTL 1: MCG control registers 2, 1
MC0CKS2 to MC0CKS0: Bits 2 to 0 of MC0CTL1 register
MC0BRS4 to MC0BRS0: Bits 4 to 0 of MC0CTL2 register
(1) MCG transmit buffer register (MC0TX)
This register is used to set the transmit data. A transmit operation starts when data is written to MC0TX while bit
7 (MC0PWR) of MCG control register 0 (MC0CTL0) is 1.
The data written to MC0TX is converted into serial data by the 8-bit shift register, and output to the MCGO pin.
Manchester code or bit sequential data can be set as the output code using bit 1 (MC0OSL) of MCG control
register 0 (MC0CTL0).
This register can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to FFH.