Datasheet

CHAPTER 15 LCD CONTROLLER/DRIVER
384 User’s Manual U18698EJ1V0UD
(4) Port function register 2 (PF2)
This register sets whether to use pins P20 to P25 as port pins (other than segment output pins) or segment
output pins.
PF2 is set using a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets PF2 to 00H.
Figure 15-5. Format of Port Function Register 2
Address: FFB5H After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
PF2 0 0 PF25 PF24 PF23 PF22 PF21 PF20
PF2n Port/segment output specification
0 Used as port (other than segment output)
1 Used as segment output
Remark n = 0 to 5
(5) Port function register ALL (PFALL)
This register sets whether to use pins P10, P11, P14 or P15 as port pins (other than segment output pins) or
segment output pins.
PFALL is set using a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets PFALL to 00H.
Figure 15-6. Format of Port Function Register ALL
Address: FFB6H After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
PFALL 0 PF15ALL PF14ALL 0 PF11ALL PF10ALL 0 0
PFnALL Port/segment output specification
0 Used as port (other than segment output)
1 Used as segment output
Remark n = 10, 11, 14 or 15