Datasheet

CHAPTER 15 LCD CONTROLLER/DRIVER
User’s Manual U18698EJ1V0UD 381
(2) LCD display mode register (LCDM)
LCDM specifies whether to enable display operation. It also specifies whether to enable segment
pin/common pin output, gate booster circuit control, and the display mode.
LCDM is set using a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets LCDM to 00H.
Figure 15-3. Format of LCD Display Mode Register
Address: FFB1H
After reset: 00H R/W
Symbol <7> <6> 5 <4> 3 2 1 0
LCDM LCDON SCOC 0 VAON 0 LCDM2 LCDM1 LCDM0
LCDON LCD display enable/disable
0 Display off (all segment outputs are deselected.)
1 Display on
SCOC Segment pin/common pin output control
Note 1
0 Output ground level to segment/common pin
1 Output deselect level to segment pin and LCD waveform to common pin
VAON Gate booster circuit control
Notes 1, 2
0 No gate voltage boosting
1 Gate voltage boosting
LCD controller/driver display mode selection
Resistance division method
LCDM2 LCDM1 LCDM0
Number of time slices Bias mode
1 1 1 8 1/4
Note 3
0 0 0 4 1/3
0 0 1 3 1/3
0 1 0 2 1/2
0 1 1 3 1/2
1 0 0 Static
Other than above Setting prohibited
(Note and Caution are listed on the next page.)