Datasheet

CHAPTER 14 SERIAL INTERFACE UART6
User’s Manual U18698EJ1V0UD
346
(4) Clock selection register 6 (CKSR6)
This register selects the base clock of serial interface UART6.
CKSR6 can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Remark CKSR6 can be refreshed (the same value is written) by software during a communication operation
(when bits 7 and 6 (POWER6, TXE6) of ASIM6 = 1 or bits 7 and 5 (POWER6, RXE6) of ASIM6 = 1).
Figure 14-8. Format of Clock Selection Register 6 (CKSR6)
Address: FF56H After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
CKSR6 0 0 0 0 TPS63 TPS62 TPS61 TPS60
Base clock (fXCLK6) selection
Note 1
TPS63 TPS62 TPS61 TPS60
f
PRS =
2 MHz
fPRS =
5 MHz
fPRS =
8 MHz
fPRS =
10 MHz
0 0 0 0 fPRS
Note 2
2 MHz 5 MHz 8 MHz 10 MHz
0 0 0 1 fPRS/2 1 MHz 2.5 MHz 4 MHz 5 MHz
0 0 1 0 fPRS/2
2
500 kHz 1.25 MHz 2 MHz 2.5 MHz
0 0 1 1 fPRS/2
3
250 kHz 625 kHz 1 MHz 1.25 MHz
0 1 0 0 fPRS/2
4
125 kHz 312.5 kHz 500 kHz 625 kHz
0 1 0 1 fPRS/2
5
62.5 kHz 156.25 kHz 250 kHz 312.5 kHz
0 1 1 0 fPRS/2
6
31.25 kHz 78.13 kHz 125 kHz 156.25 kHz
0 1 1 1 fPRS/2
7
15.625 kHz 39.06 kHz 62.5 kHz 78.13 kHz
1 0 0 0 fPRS/2
8
7.813 kHz 19.53 kHz 31.25 kHz 39.06 kHz
1 0 0 1 fPRS/2
9
3.906 kHz 9.77 kHz 15.625 kHz 19.53 kHz
1 0 1 0 fPRS/2
10
1.953 kHz 4.88 kHz 7.513 kHz 9.77 kHz
1 0 1 1 TM50 output
Note 3
Other than above Setting prohibited
Notes 1. If the peripheral hardware clock (f
PRS) operates on the high-speed system clock (fXH) (XSEL = 1), the
f
PRS operating frequency varies depending on the supply voltage.
V
DD = 2.7 to 5.5 V: fPRS 10 MHz
V
DD = 1.8 to 2.7 V: fPRS 5 MHz
2. If the peripheral hardware clock (f
PRS) operates on the internal high-speed oscillation clock (fRH) (XSEL
= 0), when 1.8 V V
DD < 2.7 V, the setting of TPS63 = TPS62 = TPS61 = TPS60 = 0 (base clock: fPRS)
is prohibited.
3. When selecting the TM50 output as the base clock. Start the operation of 8-bit timer/event counter 50
first and then enable the timer F/F inversion operation (TMC501 = 1).
Caution Make sure POWER6 = 0 when rewriting TPS63 to TPS60.
Remark f
PRS: Peripheral hardware clock frequency