Datasheet

CHAPTER 13 SERIAL INTERFACE UART0
User’s Manual U18698EJ1V0UD
332
Cautions 1. Keep the baud rate error during transmission to within the permissible error range at the
reception destination.
2. Make sure that the baud rate error during reception satisfies the range shown in (4)
Permissible baud rate range during reception.
Example: Frequency of base clock = 2.5 MHz = 2,500,000 Hz
Set value of MDL04 to MDL00 bits of BRGC0 register = 10000B (k = 16)
Target baud rate = 76,800 bps
Baud rate = 2.5 M/(2 × 16)
= 2,500,000/(2 × 16) = 78,125 [bps]
Error = (78,125/76,800 − 1) × 100
= 1.725 [%]
(3) Example of setting baud rate
Table 13-5. Set Data of Baud Rate Generator
fPRS = 2.0 MHz fPRS = 5.0 MHz fPRS = 10.0 MHz
Baud
Rate
[bps]
TPS01,
TPS00
k
Calculate
d Value
ERR
[%]
TPS01,
TPS00
k
Calculate
d Value
ERR
[%]
TPS01,
TPS00
k
Calculate
d Value
ERR
[%]
1200 3H 26 1202 0.16
− − − − − − − −
2400 3H 13 2404 0.16
− − − − − − − −
4800 2H 26 4808 0.16 3H 16 4883 1.73
− − − −
9600 2H 13 9615 0.16 3H 8 9766 1.73 3H 16 9766 1.73
10400 2H 12 10417 0.16 2H 30 10417 0.16 3H 15 10417 0.16
19200 1H 26 19231 0.16 2H 16 19531 1.73 3H 8 19531 1.73
24000 1H 21 23810 −0.79 2H 13 24038 0.16 2H 26 24038 0.16
31250 1H 16 31250 0 2H 10 31250 0 2H 20 31250 0
33660 1H 15 33333 −0.79 2H 9 34722 3.34 2H 19 32895 −2.1
38400 1H 13 38462 0.16 2H 8 39063 1.73 2H 16 39063 1.73
56000 1H 9 55556 −0.79 1H 22 56818 1.46 2H 11 56818 1.46
62500 1H 8 62500 0 1H 20 62500 0 2H 10 62500 0
76800
− − − −
1H 16 78125 1.73 2H 8 78125 1.73
115200
− − − −
1H 11 113636 −1.36 1H 22 113636 −1.36
153600
− − − −
1H 8 156250 1.73 1H 16 156250 1.73
312500
− − − −
1H 4 312500 1.73 1H 8 312500 0
625000
− − − − − − − −
1H 4 625000 0
Remark TPS01, TPS00: Bits 7 and 6 of baud rate generator control register 0 (BRGC0) (setting of base clock
(f
XCLK0))
k: Value set by the MDL04 to MDL00 bits of BRGC0 (k = 8, 9, 10, ..., 31)
f
PRS: Peripheral hardware clock frequency
ERR: Baud rate error