Datasheet

CHAPTER 12 10-BIT SUCCESSIVE APPROXIMATION TYPE A/D CONVERTER ( μ PD78F041x only)
User’s Manual U18698EJ1V0UD
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Figure 12-9. Format of A/D Port Configuration Register 0 (ADPC0)
Address: FF8FH After reset: 08H R/W
Symbol 7 6 5 4 3 2 1 0
ADPC0 0 0 0 0 0 ADPC02 ADPC01 ADPC00
Digital I/O (D)/analog input (A) switching
ADPC02 ADPC01 ADPC00
P25
/ANI5
P24
/ANI4
P23
/ANI3
P22
/AN2
P21
/ANI1
P20
/ANI0
0 0 0 A A A A A A
0 0 1 A A A A A D
0 1 0 A A A A D D
0 1 1 A A A D D D
1 0 0 A A D D D D
1 0 1 A D D D D D
1 1 0 D D D D D D
Other than above Setting prohibited
Cautions 1. Set the channel used for A/D conversion to the input mode by using port mode register 2
(PM2).
2. Do not set the pin set by ADPC0 as digital I/O by ADS, ADDS1, or ADDS0.
3. If data is written to ADPC0, a wait cycle is generated. Do not write data to ADPC0 when the
CPU is operating on the subsystem clock and the peripheral hardware clock is stopped. For
details, see CHAPTER 29 CAUTIONS FOR WAIT.
4. If pins ANI0/P20/SEG21 to ANI5/P25/SEG16 are set to segment output via the PF2 register,
output is set to segment output, regardless of the ADPC0 setting.