Datasheet

CHAPTER 5 CLOCK GENERATOR
User’s Manual U18698EJ1V0UD
133
5.6.4 Example of controlling internal low-speed oscillation clock
The internal low-speed oscillation clock cannot be used as the CPU clock.
Only the following peripheral hardware can operate with this clock.
• Watchdog timer
• 8-bit timer H1 (if fRL, fRL/2
7
or fRL/2
9
is selected as the count clock)
• LCD controller/driver (if f
RL/2
3
is selected as the LCD source clock)
In addition, the following operation modes can be selected by the option byte.
• Internal low-speed oscillator cannot be stopped
• Internal low-speed oscillator can be stopped by software
The internal low-speed oscillator automatically starts oscillation after a reset release, and the watchdog timer is
driven (240 kHz (TYP.)) if the watchdog timer operation has been enabled by the option byte.
(1) Example of setting procedure when stopping the internal low-speed oscillation clock
<1> Setting LSRSTOP to 1 (RCM register)
When LSRSTOP is set to 1, the internal low-speed oscillation clock is stopped.
(2) Example of setting procedure when restarting oscillation of the internal low-speed oscillation clock
<1> Clearing LSRSTOP to 0 (RCM register)
When LSRSTOP is cleared to 0, the internal low-speed oscillation clock is restarted.
Caution If “Internal low-speed oscillator cannot be stopped” is selected by the option byte, oscillation of
the internal low-speed oscillation clock cannot be controlled.
5.6.5 Clocks supplied to CPU and peripheral hardware
The following table shows the relation among the clocks supplied to the CPU and peripheral hardware, and setting
of registers.
Table 5-4. Clocks Supplied to CPU and Peripheral Hardware, and Register Setting
Supplied Clock
Clock Supplied to CPU Clock Supplied to Peripheral Hardware
XSEL CSS MCM0 EXCLK
Internal high-speed oscillation clock 0 0
× ×
X1 clock 1 0 0 0 Internal high-speed oscillation clock
External main system clock 1 0 0 1
X1 clock 1 0 1 0
External main system clock 1 0 1 1
Internal high-speed oscillation clock 0 1
× ×
1 1 0 0 X1 clock
1 1 1 0
1 1 0 1
Subsystem clock
External main system clock
1 1 1 1
Remarks 1. XSEL: Bit 2 of the main clock mode register (MCM)
2. CSS: Bit 4 of the processor clock control register (PCC)
3. MCM0: Bit 0 of MCM
4. EXCLK: Bit 7 of the clock operation mode select register (OSCCTL)
5. ×: don’t care