Datasheet

CHAPTER 5 CLOCK GENERATOR
User’s Manual U18698EJ1V0UD
112
Table 5-2. Relationship Between CPU Clock and Minimum Instruction Execution Time
Minimum Instruction Execution Time: 2/fCPU
Main System Clock
High-Speed System Clock
Note
Internal High-Speed
Oscillation Clock
Note
Subsystem Clock
CPU Clock (fCPU)
At 10 MHz Operation At 8 MHz (TYP.) Operation At 32.768 kHz Operation
fXP 0.2 μ s 0.25 μ s (TYP.)
−
fXP/2 0.4 μ s 0.5 μ s (TYP.)
−
fXP/2
2
0.8 μ s 1.0 μ s (TYP.)
−
fXP/2
3
1.6 μ s 2.0 μ s (TYP.)
−
fXP/2
4
3.2 μ s 4.0 μ s (TYP.)
−
fSUB/2
− −
122.1 μ s
Note The main clock mode register (MCM) is used to set the main system clock supplied to CPU clock (high-
speed system clock/internal high-speed oscillation clock) (see Figure 5-6).
(3) Setting of operation mode for subsystem clock pin
The operation mode for the subsystem clock pin can be set by using bit 4 (OSCSELS) of the clock operation
mode select register (OSCCTL) in combination.
Table 5-3. Setting of Operation Mode for Subsystem Clock Pin
Bit 4 of OSCCTL
OSCSELS
Subsystem Clock Pin
Operation Mode
P123/XT1 Pin P124/XT2 Pin
0 Input port mode Input port
1 XT1 oscillation mode Crystal resonator connection
Caution Confirm that bit 5 (CLS) of the processor clock control register (PCC) is 0 (CPU is operating
with main system clock) when changing the current values of OSCSELS.