Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 20 CAN CONTROLLER
R01UH0042EJ0500 Rev.5.00 Page 958 of 1513
Aug 12, 2011
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(b) Write
Set CIE5 Clear CIE5 Setting of CIE5 bit
0 1 CIE5 bit is cleared to 0.
1 0 CIE5 bit is set to 1.
Other than above CIE5 bit is not changed.
Set CIE4 Clear CIE4 Setting of CIE4 bit
0 1 CIE4 bit is cleared to 0.
1 0 CIE4 bit is set to 1.
Other than above CIE4 bit is not changed.
Set CIE3 Clear CIE3 Setting of CIE3 bit
0 1 CIE3 bit is cleared to 0.
1 0 CIE3 bit is set to 1.
Other than above CIE3 bit is not changed.
Set CIE2 Clear CIE2 Setting of CIE2 bit
0 1 CIE2 bit is cleared to 0.
1 0 CIE2 bit is set to 1.
Other than above CIE2 bit is not changed.
Set CIE1 Clear CIE1 Setting of CIE1 bit
0 1 CIE1 bit is cleared to 0.
1 0 CIE1 bit is set to 1.
Other than above CIE1 bit is not changed.
Set CIE0 Clear CIE0 Setting of CIE0 bit
0 1 CIE0 bit is cleared to 0.
1 0 CIE0 bit is set to 1.
Other than above CIE0 bit is not changed.