Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 20 CAN CONTROLLER
R01UH0042EJ0500 Rev.5.00 Page 956 of 1513
Aug 12, 2011
(9) CAN0 module error counter register (C0ERC)
The C0ERC register indicates the count value of the transmission/reception error counter.
After reset: 0000H R Address: 03FEC054H
15 14 13 12 11 10 9 8
C0ERC REPS REC6 REC5 REC4 REC3 REC2 REC1 REC0
7 6 5 4 3 2 1 0
TEC7 TEC6 TEC5 TEC4 TEC3 TEC2 TEC1 TEC0
REPS Reception error passive status bit
0 The value of the reception error counter is not error passive (< 128)
1 The value of the reception error counter is in the error passive range (≥ 128)
REC6 to REC0 Reception error counter bit
0 to 127
Number of reception errors. These bits reflect the status of the reception error counter. The
number of errors is defined by the CAN protocol.
Remark The REC6 to REC0 bits of the reception error counter are invalid in the reception error passive status
(C0INFO.RECS1, C0INFO.RECS0 bit = 11B).
TEC7 to TEC0 Transmission error counter bit
0 to 255
Number of transmission errors. These bits reflect the status of the transmission error counter.
The number of errors is defined by the CAN protocol.
Remark The TEC7 to TEC0 bits of the transmission error counter are invalid in the bus-off status
(C0INFO.BOFF bit = 1).