Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 20 CAN CONTROLLER
R01UH0042EJ0500 Rev.5.00 Page 954 of 1513
Aug 12, 2011
(7) CAN0 module last error information register (C0LEC)
The C0LEC register provides the error information of the CAN protocol.
After reset: 00H R/W Address: 03FEC052H
7 6 5 4 3 2 1 0
C0LEC 0 0 0 0 0 LEC2 LEC1 LEC0
LEC2 LEC1 LEC0 Last CAN protocol error information
0 0 0 No error
0 0 1 Stuff error
0 1 0 Form error
0 1 1 ACK error
1 0 0
Bit error. (The CAN module tried to transmit a recessive-level bit as part of a
transmit message (except the arbitration field), but the value on the CAN bus is a
dominant-level bit.)
1 0 1
Bit error. (The CAN module tried to transmit a dominant-level bit as part of a
transmit message, ACK bit, error frame, or overload frame, but the value on the
CAN bus is a recessive-level bit.)
1 1 0 CRC error
1 1 1 Undefined
Caution Be sure to set bits 3 to 7 to “0”.
Remarks 1. The contents of the C0LEC register are not cleared when the CAN module changes from an
operation mode to the initialization mode.
2. If an attempt is made to write a value other than 00H to the C0LEC register by software, the
access is ignored.