Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 20 CAN CONTROLLER
R01UH0042EJ0500 Rev.5.00 Page 951 of 1513
Aug 12, 2011
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CCERC Error counter clear bit
0 The C0ERC and C0INFO registers are not cleared in the initialization mode.
1 The C0ERC and C0INFO registers are cleared in the initialization mode.
Remarks 1. The CCERC bit is used to clear the C0ERC and C0INFO registers for re-initialization or forced
recovery from the bus-off status. This bit can be set to 1 only in the initialization mode.
2. When the C0ERC and C0INFO registers have been cleared, the CCERC bit is also cleared to 0
automatically.
3. The CCERC bit can be set to 1 at the same time as a request to change the initialization mode to
an operation mode is made.
4. If the CCERC bit is set to 1 immediately after the INIT mode is entered in the self test mode, the
receive data may be corrupted.
AL Bit to set operation in case of arbitration loss
0 Re-transmission is not executed in case of an arbitration loss in the single-shot mode.
1 Re-transmission is executed in case of an arbitration loss in the single-shot mode.
Remark The AL bit is valid only in the single-shot mode.
VALID Valid receive message frame detection bit
0 A valid message frame has not been received since the VALID bit was last cleared to 0.
1 A valid message frame has been received since the VALID bit was last cleared to 0.
Remarks 1. Detection of a valid receive message frame is not dependent upon the existence or non-
existence of the storage in the receive message buffer (data frame) or transmit message buffer
(remote frame).
2. Clear the VALID bit (0) before changing the initialization mode to an operation mode.
3. If only two CAN nodes are connected to the CAN bus with one transmitting a message frame in
the normal mode and the other in the receive-only mode, since no ACK is generated in the
receive-only mode, the VALID bit is not set to 1 before the transmitting node enters the error
passive status.
4. To clear the VALID bit, set the Clear VALID bit to 1 first and confirm that the VALID bit is cleared.
If it is not cleared, perform clearing processing again.