Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 3 CPU FUNCTION
R01UH0042EJ0500 Rev.5.00 Page 91 of 1513
Aug 12, 2011
3.4.7 Programmable peripheral I/O registers
The BPC register is used to select the programmable peripheral I/O register area.
The BPC register is valid only
μ PD70F3770, 70F3771.
(1) Peripheral I/O area select control register (BPC)
This register can be read or written in 16-bit units.
Reset sets this register to 0000H.
BPC
12 1
08 6
4214
0
1
3
11
9
7
53
1
5
PA1
5
0 PA13 PA1
2
PA1
1
PA1
0
PA09 PA08 PA07 PA06 PA05 PA04 PA03 PA02 PA01 PA00
1
PA15
0
1
PA13 to
PA00
After reset: 0000H R/W Address: FFFFF064H
Do not allow use of programmable peripheral I/O area.
Allow use of programmable peripheral I/O area.
Allows/does not allow use of programmable peripheral I/O area.
Set address of programmable peripheral I/O area. (correspond to A27 to
A14)
Caution If the PA15 bit is set to 1, be sure to set the BPC register to 8FFBH.
If the PA15 bit is set to 0, be sure to set the BPC register to 0000H.
For the list of programmable peripheral I/O registers, refer to Table 20-16 Register Access Type.