Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 20 CAN CONTROLLER
R01UH0042EJ0500 Rev.5.00 Page 904 of 1513
Aug 12, 2011
20.2.4 Error frame
An error frame is output by a node that has detected an error.
Figure 20-15. Error Frame
<1>
R
D
<2> <3>
6 bits
0 to 6 bits 8 bits
(<4>) (<5>)
Interframe space or overload frame
Error delimiter
Error flag 2
Error flag 1
Error bit
Error frame
Remark D: Dominant = 0
R: Recessive = 1
Table 20-7. Definition of Error Frame Fields
No. Name Bit Count Definition
<1> Error flag 1 6
Error active node: Outputs 6 dominant-level bits consecutively.
Error passive node: Outputs 6 recessive-level bits consecutively.
If another node outputs a dominant level while one node is outputting a
passive error flag, the passive error flag is not cleared until the same level
is detected 6 bits in a row.
<2> Error flag 2 0 to 6 Nodes receiving error flag 1 detect bit stuff errors and issues this error flag.
<3> Error delimiter 8
Outputs 8 recessive-level bits consecutively.
If a dominant level is detected at the 8th bit, an overload frame is
transmitted from the next bit.
<4> Error bit –
The bit at which the error was detected.
The error flag is output from the bit next to the error bit.
In the case of a CRC error, this bit is output following the ACK delimiter.
<5>
Interframe space/overload
frame
– An interframe space or overload frame starts from here.