Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 19 I
2
C BUS
R01UH0042EJ0500 Rev.5.00 Page 889 of 1513
Aug 12, 2011
Figure 19-24. Example of Slave to Master Communication
(When 8-Clock Wait for Master and 9-Clock Wait for Slave Are Selected) (1/3)
(a) Start condition ~ address
IICn
ACKDn
STDn
SPDn
WTIMn
H
H
L
L
L
H
L
ACKEn
MSTSn
STTn
L
L
SPTn
WRELn
INTIICn
TRCn
IICn
ACKDn
STDn
SPDn
WTIMn
ACKEn
MSTSn
STTn
SPTn
WRELn
INTIICn
TRCn
SCL0n
SDA0n
123456789 4 56321
AD6 AD5 AD4 AD3 AD2 AD1 AD0 D4 D3 D2D5D6D7
IICn ← address IICn ← FFH Note 1
Note 1
IICn ← data Note 2
ACK
R
Processing by master device
ReceiveTransmit
Receive Transmit
Transfer lines
Processing by slave device
Notes 1. To cancel the master wait state, write FFH to IICn or set WRELn.
2. Cancel the wait during a slave transmission by writing to IICn, not by setting WRELn.
Remark n = 0 to 2