Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 19 I
2
C BUS
R01UH0042EJ0500 Rev.5.00 Page 881 of 1513
Aug 12, 2011
Figure 19-19. Master Operation in Multimaster System (3/3)
Write IICn
WTIMn = 1
WRELn = 1
Read IICn
ACKEn = 1
WTIMn = 0
WTIMn = WRELn = 1
ACKEn = 0
Write IICn
Yes
TRCn = 1?
Restarted?
MSTSn = 1?
Communication start
(address, transfer direction specification)
Transmission start
No
Yes
Waiting for data
transmission
Reception start
Yes
No
INTIICn
interrupt occurred?
Yes
No
Transfer completed?
Waiting for ACK detection
Yes
No
INTIICn
interrupt occurred?
Waiting for data transmission
Not in communication
Yes
No
INTIICn
interrupt occurred?
No
Yes
ACKDn = 1?
No
Yes
No
C
2
Yes
MSTSn = 1?
No
Yes
Transfer completed?
No
Yes
ACKDn = 1?
No
2
Yes
MSTSn = 1?
No
2
Waiting for ACK detection
Yes
No
INTIICn
interrupt occurred?
Yes
MSTSn = 1?
No
C
2
Yes
EXCn = 1 or COIn = 1?
No
1
2
SPTn = 1
STTn = 1
Slave operation
END
Communication processing
Communication processing
Remarks 1. For the transmission and reception formats, comply with the specifications of the communicating
product.
2. When using the V850ES/JG3-H or V850ES/JH3-H as the master in a multimaster system, read the
IICSn.MSTSn bit for each INTIICn interrupt occurrence to confirm the arbitration result.
3. When using the V850ES/JG3-H or V850ES/JH3-H as the slave in a multimaster system, confirm the
status using the IICSn and IICFn registers for each INTIICn interrupt occurrence to determine the
next processing.
4. n = 0 to 2