Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 3 CPU FUNCTION
R01UH0042EJ0500 Rev.5.00 Page 86 of 1513
Aug 12, 2011
(10/14)
Manipulatable Bits Address Function Register Name Symbol R/W
1 8 16
Default Value
FFFFF80CH Internal oscillation mode register RCM
√ √
00H
FFFFF810H DMA trigger factor register 0 DTFR0
√ √
00H
FFFFF812H DMA trigger factor register 1 DTFR1
√ √
00H
FFFFF814H DMA trigger factor register 2 DTFR2
√ √
00H
FFFFF820H Power save mode register PSMR
√ √
00H
FFFFF822H Clock control register CKC
R/W
√ √
0AH
FFFFF824H Lock register LOCKR R
√ √
00H
FFFFF828H Processor clock control register PCC
√ √
03H
FFFFF82CH PLL control register PLLCTL
R/W
√ √
01H
FFFFF82EH CPU operation clock status register CCLS R
√ √
00H
FFFFF870H Clock monitor mode register CLM
√ √
00H
FFFFF888H Reset source flag register RESF
√ √
00H
FFFFF890H Low-voltage detection register LVIM
√ √
00H
FFFFF892H Internal RAM data status register RAMS
√ √
01H
FFFFF8B0H Prescaler mode register 0 PRSM0
√ √
00H
FFFFF8B1H Prescaler compare register 0 PRSCM0
√
00H
FFFFF9FCH On-chip debug mode register
Note
OCDM
Note
√ √
01H
FFFFFA00H UARTC0 control register 0 UC0CTL0
√ √
10H
FFFFFA01H UARTC0 control register 1 UC0CTL1
√
00H
FFFFFA02H UARTC0 control register 2 UC0CTL2
√
FFH
FFFFFA03H UARTC0 option control register 0 UC0OPT0
√ √
14H
FFFFFA04H UARTC0 status register UC0STR
R/W
√ √
00H
FFFFFA06H UARTC0 receive data register UC0RX R
√ √
01FFH
FFFFFA06H UARTC0 receive data register L UC0RXL
√
FFH
FFFFFA08H UARTC0 transmit data register UC0TX
√
01FFH
FFFFFA08H UARTC0 transmit data register L UC0TXL
√
FFH
FFFFFA0AH UARTC0 option control register 1 UC0OPT1
√ √
00H
FFFFFA10H UARTC1 control register 0 UC1CTL0
√ √
10H
FFFFFA11H UARTC1 control register 1 UC1CTL1
√
00H
FFFFFA12H UARTC1 control register 2 UC1CTL2
√
FFH
FFFFFA13H UARTC1 option control register 0 UC1OPT0
√ √
14H
FFFFFA14H UARTC1 status register UC1STR
R/W
√ √
00H
FFFFFA16H UARTC1 receive data register UC1RX R
√
01FFH
FFFFFA16H UARTC1 receive data register L UC1RXL
√
FFH
FFFFFA18H UARTC1 transmit data register UC1TX
√
01FFH
FFFFFA18H UARTC1 transmit data register L UC1TXL
√
FFH
FFFFFA1AH UARTC1 option control register 1 UC1OPT1
√ √
00H
FFFFFA20H UARTC2 control register 0 UC2CTL0
√ √
10H
FFFFFA21H UARTC2 control register 1 UC2CTL1
√
00H
FFFFFA22H UARTC2 control register 2 UC2CTL2
√
FFH
FFFFFA23H UARTC2 option control register 0 UC2OPT0
R/W
√ √
14H
Note V850ES/JG3-H only