Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 19 I
2
C BUS
R01UH0042EJ0500 Rev.5.00 Page 815 of 1513
Aug 12, 2011
19.1.2 UARTC4, CSIF0, and I
2
C01 mode switching
In the V850ES/JG3-H and V850ES/JH3-H, UARTC4, CSIF0, and I
2
C01 share the same pins and therefore cannot be
used simultaneously. Switching among UARTC4, CSIF0, and I
2
C01 must be set in advance, using the PMC4, PFC4, and
PFCE4 registers.
Caution The transmit/receive operation of UARTC4, CSIF0, and I
2
C01 is not guaranteed if these functions are
switched during transmission or reception. Be sure to disable the one that is not used.
Figure 19-2. UARTC4, CSIF0, and I
2
C01 Mode Switch Settings
PMC4 0 0 0 0 0 PMC42 PMC41 PMC40
After reset: 00H R/W Address: FFFFF448H
PFC4
After reset: 00H R/W Address: FFFFF468H
0 0 0 0 0 PFC42 PFC41 PFC40
PMC4n
0
1
1
1
Operation mode
PFC4n
×
0
0
1
Port I/O mode
CSIF0 mode
I
2
C01 mode
UARTC4 mode
PFCE4n
×
0
1
0
PFCE4
After reset: 00H R/W Address: FFFFF708H
0 0 0 0 0 0 PFCE41 PFCE40
Remarks 1. n = 0, 1
2. × = don’t care