Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 18 3-WIRE VARIABLE-LENGTH SERIAL I/O (CSIF)
R01UH0042EJ0500 Rev.5.00 Page 807 of 1513
Aug 12, 2011
18.6.13 Reception error
When transfer is performed with reception enabled (CFnCTL0.CFnRXE bit = 1) in the continuous transfer mode, the
reception completion interrupt request signal (INTCFnR) is generated again when the next receive operation is completed
before the CFnRX register is read after the INTCFnR signal is generated, and the overrun error flag (CFnSTR.CFnOVE) is
set to 1.
Even if an overrun error has occurred, the previous receive data is lost since the CFnRX register is updated. Even if a
reception error has occurred, the INTCFnR signal is generated again upon the next reception completion if the CFnRX
register is not read.
To avoid an overrun error, complete reading the CFnRX register by one half clock before sampling the last bit of the
next receive data from the INTCFnR signal generation.
(1) Operation timing
SCKFn pin
CFnRX register
read signal
(1) (2) (4)
01H 02H 05H 0AH 15H 2AH 55H AAH 00H 01H 02H 05H 0AH 15H 2AH 55H
Shift register
AAH 55H
CFnRX register
SIFn pin
INTCFnR signal
CFnOVE bit
SIFn pin capture
timing
(3)
(1) Start continuous transfer.
(2) Completion of the first transfer
(3) The CFnRX register cannot be read until one half clock before the completion of the second transfer.
(4) An overrun error occurs, and the reception completion interrupt request signal (INTCFnR) is
generated, and then the overrun error flag (CFnSTR.CFnOVE) is set to 1. The receive data is
overwritten.
Remark n = 0 to 4