Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 18 3-WIRE VARIABLE-LENGTH SERIAL I/O (CSIF)
R01UH0042EJ0500 Rev.5.00 Page 767 of 1513
Aug 12, 2011
CSIFn includes the following hardware.
Table 18-1. Configuration of CSIFn
Item Configuration
Registers
CSIFn receive data register (CFnRX)
CSIFn transmit data register (CFnTX)
CSIFn control register 0 (CFnCTL0)
CSIFn control register 1 (CFnCTL1)
CSIFn control register 2 (CFnCTL2)
CSIFn status register (CFnSTR)
(1) CSIFn receive data register (CFnRX)
The CFnRX register is a 16-bit buffer register that holds receive data.
This register is read-only, in 16-bit units.
The receive operation is started by reading the CFnRX register in the reception enabled status.
If the transfer data length is 8 bits, the lower 8 bits of this register are read-only in 8-bit units as the CFnRXL
register.
Reset sets this register to 0000H.
In addition to reset input, the CFnRX register can be initialized by clearing (to 0) the CFnPWR bit of the CFnCTL0
register.
After reset: 0000H R Address: CF0RX FFFFFD04H, CF1RX FFFFFD14H,
CF2RX FFFFFD24H, CF3RX FFFFFD34H,
CF4RX FFFFFD44H
CFnRX
(n = 0 to 4)