Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 18 3-WIRE VARIABLE-LENGTH SERIAL I/O (CSIF)
R01UH0042EJ0500 Rev.5.00 Page 764 of 1513
Aug 12, 2011
18.1.3 CSIF3 and UARTC2 mode switching
In the V850ES/JG3-H and V850ES/JH3-H, CSIF3 and UARTC2 share the same pins and therefore cannot be used
simultaneously. Switching between CSIF3 and UARTC2 must be set in advance, using the PMC9, PFC9 and PFCE9
registers.
Caution The transmit/receive operation of CSIF3 and UARTC2 is not guaranteed if these functions are
switched during transmission or reception. Be sure to disable the one that is not used.
Figure 18-3. CSIF3 and UARTC2 Mode Switch Settings
Port I/O mode
CSIF3 mode
UARTC2 mode
PMC91n
0
1
1
Operation mode
PFCE91n
×
0
0
PFC91n
×
0
1
PMC9
After reset: 0000H R/W Address: FFFFF452H, FFFFF453H
PMC97 PMC96 PMC95 PMC94 PMC93 PMC92 PMC91 PMC90
PMC915 PMC914 PMC913 PMC912 PMC911 PMC910 PMC99 PMC98
89101112131415
PFC9
After reset: 0000H R/W Address: FFFFF472H, FFFFF473H
PFC915 PFC914 PFC913 PFC912 PFC911 PFC910 PFC99 PFC98
PFC97 PFC96 PFC95 PFC94 PFC93 PFC92 PFC91 PFC90
89101112131415
PFCE915 PFCE914 0 0 PFCE911 PFCE910 PFCE99 PFCE98
PFCE97 PFCE96 PFCE95 PFCE94 PFCE93 PFCE92 PFCE91 PFCE90
89101112131415
PFCE9
After reset: 0000H R/W Address: FFFFF712H, FFFFF713H
Remarks 1. n = 0, 1
2. × = don’t care