Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC)
R01UH0042EJ0500 Rev.5.00 Page 755 of 1513
Aug 12, 2011
(3) UARTCn control register 2 (UCnCTL2)
The UCnCTL2 register is an 8-bit register that selects the baud rate (serial transfer speed) clock of UARTCn.
This register can be read or written in 8-bit units.
Reset sets this register to FFH.
Caution Clear the UCnCTL0.UCnPWR bit to 0 or clear the UCnTXE and UCnRXE bits to 00 before rewriting
the UCnCTL2 register.
UCnBRS7UCnCTL2
(n = 0 to 4)
UCnBRS6 UCnBRS5UCnBRS4 UCnBRS3UCnBRS2 UCnBRS1 UCnBRS0
654321
After reset FFH R/W Address: UC0CTL2 FFFFFA02H, UC1CTL2 FFFFFA12H,
UC2CTL2 FFFFFA22H, UC3CTL2 FFFFFA32H,
UC4CTL2 FFFFFA42H
7 0
UCn
BRS7
0
0
0
0
:
1
1
1
1
UCn
BRS6
0
0
0
0
:
1
1
1
1
UCn
BRS5
0
0
0
0
:
1
1
1
1
UCn
BRS4
0
0
0
0
:
1
1
1
1
UCn
BRS3
0
0
0
0
:
1
1
1
1
UCn
BRS2
0
1
1
1
:
1
1
1
1
UCn
BRS1
×
0
0
1
:
0
0
1
1
UCn
BRS0
×
0
1
0
:
0
1
0
1
Default
(k)
×
4
5
6
:
252
253
254
255
Serial
clock
f
UCLK /4
f
UCLK /5
f
UCLK /6
:
f
UCLK /252
f
UCLK /253
f
UCLK /254
f
UCLK /255
Setting
prohibited
Remark f
UCLK: Clock frequency selected by the UCnCTL1.UCnCKS3 to
UCnCTL1.UCnCKS0 bits