Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 3 CPU FUNCTION
R01UH0042EJ0500 Rev.5.00 Page 75 of 1513
Aug 12, 2011
(2) Data space
With the V850ES/JG3-H and V850ES/JH3-H, it seems that there are sixty-four 64 MB address spaces on the 4 GB
CPU address space. Therefore, the least significant bit (bit 25) of a 26-bit address is sign-extended to 32 bits and
allocated as an address.
(a) Application example of wraparound
If R = r0 (zero register) is specified for the LD/ST disp16 [R] instruction, a range of addresses 00000000H ±32
KB can be addressed by sign-extended disp16. All the resources, including the internal hardware, can be
addressed by one pointer.
The zero register (r0) is a register fixed to 0 by hardware, and practically eliminates the need for registers
dedicated to pointers.
Example:
μ PD70F3767
Internal ROM area
On-chip peripheral
I/O area
Internal RAM area
32 KB
4 KB
28 KB
0007FFFFH
00007FFFH
00000000H
FFFFF000H
FFFFEFFFH
FFFF8000H
FFFF3000H
(R = )