Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC)
R01UH0042EJ0500 Rev.5.00 Page 736 of 1513
Aug 12, 2011
(7) UARTCn receive data register L (UCnRXL) and UARTCn receive data register (UCnRX)
The UCnRXL and UCnRX register are an 8- bit or 9-bit buffer register that stores parallel data converted by the
receive shift register.
The data stored in the receive shift register is transferred to the UCnRXL and UCnRX register upon completion of
reception of 1 byte of data.
During LSB-first reception when the data length has been specified as 7 bits, the receive data is transferred to bits
6 to 0 of the UCnRXL register and the MSB always becomes 0. During MSB-first reception, the receive data is
transferred to bits 7 to 1 of the UCnRXL register and the LSB always becomes 0.
When an overrun error (UCnOVE) occurs, the receive data at this time is not transferred to the UCnRXL and
UCnRX register and is discarded.
The access unit or reset value differs depending on the character length.
• Character length 7/8-bit (UCnOPT1.UCnEBE = 0)
This register is read-only, in 8-bit units.
Reset or UCnCTL0.UCnPWR bit = 0 sets this register to FFH.
• Character length 9-bit (UCnOPT1.UCnEBE = 0)
This register is read-only, in 16-bit units.
Reset or UCnCTL0.UCnPWR bit = 0 sets this register to 01FFH.
(a) Character length 7/8-bit (UCnOPT1.UCnEBE = 0)
UCnRXL
(n = 0 to 4)
654321
After reset: FFH R Address:
UC0RXL FFFFFA06H, UC1RXL FFFFFA16H,
UC2RXL FFFFFA26H, UC3RXL FFFFFA36H,
UC4RXL FFFFFA46H
7 0
(b) Character length 9-bit (UCnOPT1.UCnEBE = 1)
After reset: 01FFH R Address:
UC0RX FFFFFA06H, UC1RX FFFFFA16H,
UC2RX FFFFFA26H, UC3RX FFFFFA36H,
UC4RX FFFFFA46H
UCnRX
(n = 0 to 4)
65432170
0000000
14 13 12 11 10 915 8