Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC)
R01UH0042EJ0500 Rev.5.00 Page 722 of 1513
Aug 12, 2011
(1) UARTCn control register 0 (UCnCTL0)
The UCnCTL0 register is an 8-bit register used to specify the UARTCn operation.
(2) UARTCn control register 1 (UCnCTL1)
The UCnCTL1 register is an 8-bit register used to select the input clock for the UARTCn.
(3) UARTCn control register 2 (UCnCTL2)
The UCnCTL2 register is an 8-bit register used to control the baud rate for the UARTCn.
(4) UARTCn option control register 0 (UCnOPT0)
The UCnOPT0 register is an 8-bit register used to control serial transfer for the UARTCn.
(5) UARTCn option control register 1 (UCnOPT1)
The UCnOPT1 register is an 8-bit register used to control 9-bit length serial transfer for the UARTCn.
(6) UARTCn status register (UCnSTR)
The UCnSTRn register consists of flags indicating the error contents when a reception error occurs. Each one of
the reception error flags is set (to 1) upon occurrence of a reception error.
(7) UARTCn receive shift register
This is a shift register used to convert the serial data input to the RXDCn pin into parallel data. Upon reception of 1
byte of data and detection of the stop bit, the receive data is transferred to the UCnRX register.
This register cannot be manipulated directly.
(8) UARTCn receive data register (UCnRX)
The UCnRX register is an 8-bit register that holds receive data. When 7 characters are received, 0 is stored in the
most significant bit (when data is received with the LSB first).
In the reception enabled status, receive data is transferred from the UARTCn receive shift register to the UCnRX
register in synchronization with the completion of shift-in processing of 1 frame.
Transfer to the UCnRX register also causes the reception completion interrupt request signal (INTUCnR) to be
output.
(9) UARTCn transmit shift register
The transmit shift register is a shift register used to convert the parallel data transferred from the UCnTX register
into serial data.
When 1 byte of data is transferred from the UCnTX register, the shift register data is output from the TXDCn pin.
This register cannot be manipulated directly.
(10) UARTCn transmit data register (UCnTX)
The UCnTX register is an 8-bit transmit data buffer. Transmission starts when transmit data is written to the UCnTX
register. When data can be written to the UCnTX register (when data of one frame is transferred from the UCnTX
register to the UARTCn transmit shift register), the transmission enable interrupt request signal (INTUCnT) is
generated.