Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 15 A/D CONVERTER
R01UH0042EJ0500 Rev.5.00 Page 684 of 1513
Aug 12, 2011
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ADA0TMD
0
1
Software trigger mode
External trigger mode/timer trigger mode
Trigger mode specification
ADA0EF
0
1
A/D conversion stopped
A/D conversion in progress
A/D converter status display
Cautions 1. Accessing the ADA0M0 register is prohibited in the following statuses. For details,
see 3.4.9 (2) Accessing specific on-chip peripheral I/O registers.
• When the CPU operates on the subclock and the main clock oscillation is stopped
• When the CPU operates on the internal oscillation clock
2. A write operation to bit 0 is ignored.
3. Changing the ADA0M1.ADA0FR2 to ADA0M1.ADA0FR0 bits is prohibited while A/D
conversion is enabled (ADA0CE bit = 1).
4. In the following modes, write data to the ADA0M0, ADA0M2, ADA0S, ADA0PFM, or
ADA0PFT registers while A/D conversion is stopped (ADA0CE bit = 0), and then enable
the A/D conversion operation (ADA0CE bit = 1).
• Normal conversion mode
• One-shot select mode/one-shot scan mode in high-speed conversion mode
If the ADA0M0, ADA0M2, ADA0S, ADA0PFM, and ADA0PFT registers are written in
other modes during A/D conversion (ADA0EF bit = 1), the following will be performed
according to the mode.
• In software trigger mode
A/D conversion is stopped and started again from the beginning.
• In hardware trigger mode
A/D conversion is stopped, and the trigger standby status is set.
5. To select the external trigger mode/timer trigger mode (ADA0TMD bit = 1), set the high-
speed conversion mode (ADA0M1.ADA0HS1 bit = 1). Do not input a trigger during
stabilization time that is inserted once after the A/D conversion operation is enabled
(ADA0CE bit = 1).
6. When not using the A/D converter, stop the operation by setting the ADA0CE bit to 0 to
reduce the power consumption.