Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 12 REAL-TIME COUNTER
R01UH0042EJ0500 Rev.5.00 Page 653 of 1513
Aug 12, 2011
(a) Alarm interrupt setting examples (RC1ALM, RC1ALH, and RC1ALW setting examples)
Tables 12-4 and 12-5 show setting examples if Sunday is RC1WEEK = 00, Monday is RC1WEEK = 01,
Tuesday is RC1WEEK = 02, ···, and Saturday is RC1WEEK = 06.
Table 12-4. Alarm Setting Example if AMPM = 0 (RC1HOUR Register 12-Hour Display)
Register
Alarm Setting Time
RC1ALW RC1ALH RC1ALM
Sunday, 7:00 a.m. 01H 07H 00H
Sunday/Monday, 00:15 p.m. 03H 32H 15H
Monday/Tuesday/Friday, 5:30 p.m. 26H 25H 30H
Everyday, 10:45 p.m. 7FH 30H 45H
Table 12-5. Alarm Setting Example if AMPM = 1 (RC1HOUR Register 24-Hour Display)
Register
Alarm Setting Time
RC1ALW RC1ALH RC1ALM
Sunday, 7:00 01H 07H 00H
Sunday/Monday, 12:15 03H 12H 15H
Monday/Tuesday/Friday, 17:30 26H 17H 30H
Everyday, 22:45 7FH 22H 45H
(17) Prescaler mode register 0 (PRSM0)
The PRSM0 register (8-bit) controls the generation of the real time counter count clock (f
BRG).
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
0PRSM0 0 0 BGCE0 0 0 BGCS01 BGCS00
Disabled
Enabled
BGCE0
0
1
Main clock operation enable
f X
f X /2
f
X /4
f X /8
5 MHz
200 ns
400 ns
800 ns
1.6 μs
4 MHz
250 ns
500 ns
1 μs
2 μs
BGCS01
0
0
1
1
BGCS00
0
1
0
1
Selection of real time counter source clock(f
BGCS )
After reset : 00H R/W Address : FFFFF8B0H
< >
Cautions 1. Do not change the values of the BGCS00 and BGCS01 bits during real time
counteroperation.
2. Set the PRSM0 register before setting the BGCE0 bit to 1.
3. Set the PRSM0 and PRSCM0 registers according to the main clock frequency that is used
so as to obtain an f
BRG frequency of 32.768 kHz.