Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 12 REAL-TIME COUNTER
R01UH0042EJ0500 Rev.5.00 Page 638 of 1513
Aug 12, 2011
Figure 12-1. Block Diagram of Real-Time Counter
Count enable/
disable circuit
Sub-counter
(16-bit)
Second
counter
(7-bit)
Second
counter
write buffer
Minute
counter
write buffer
Hour
counter
write buffer
Day
counter
write buffer
Week
counter
write buffer
Minute
counter
(7-bit)
Hour
counter
(6-bit)
Day
counter
(3-bit)
Day-of week
counter
(3-bit)
INTRTC0
INTRTC1
1 minute 1 hour
1 day
1 month
Count clock
= 32.768 kHz
f
XT
fXT/2
6
fXT/2
f
XT/2
6
fXT/2
7
fXT/2
8
fXT/2
9
fXT/2
10
fXT/2
11
fXT/2
12
fBRG
Note
Month
counter
write buffer
Year
counter
write buffer
Month
counter
(5-bit)
Year
counter
(8-bit)
Minute
alarm
ICT2 to ICT0
Hour
alarm
Day-of-week
alarm
12-bit counter
CKDIV
RINTE
INTRTC2
RTCDIV
CLOE2
RTCCL
CLOE0
RTC1HZ
CLOE1
Selector
Selector
Selector
Selector
Note For detail of f
BRG, refer to 12.3 (17) Prescaler mode register 0 (PRSM0) and 12.3 (18) Prescaler compare
register 0 (PRSCM0).
Remark f
BRG: Real-time counter count clock frequency
fXT: Subclock frequency
INTRTC0: Real-time counter fixed-cycle interrupt signal
INTRTC1: Real-time counter alarm match interrupt signal
INTRTC2: Real-time counter interval interrupt signal