Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 11 MOTOR CONTROL FUNCTION

R01UH0042EJ0500 Rev.5.00 Page 628 of 1513

Aug 12, 2011

11.4.5 TAA4 tuning operation for A/D conversion start trigger signal output

This section explains the tuning operation of TAA4 and TAB1 in the 6-phase PWM output mode.

In the 6-phase PWM output mode, the tuning operation is performed with TAB1 serving as the master and TAA4 as a

slave. The conversion start trigger signal of the A/D converter can be set as the A/D conversion start trigger source by the

INTTAA4CC0 and INTTAA4CC1 signals of TAA4 and the INTTAB1OV and INTTAB1CC0 signals of TAB1.

(1) Tuning operation starting procedure

The TAA4 and TAB1 registers should be set using the following procedure to perform the tuning operation.

(a) Setting of TAA4 register (stop the operations of TAB1 and TAA4 (by clearing the TAB1CTL0.TAB1CE bit

and TAA4CTL0.TAA4CE bit to 0)).

• Set the TAA4CTL1 register to 85H (set the tuning operation slave mode and free-running timer mode).

• Clear the TAA4OPT0 register to 00H (select the compare register).

• Set an appropriate value to the TAA4CCR0 and TAA4CCR1 registers (set the default value for comparison

for starting the operation).

(b) Setting of TAB1 register

• Set the TAB1CTL1 register to 07H (master mode and 6-phase PWM output mode).

• Set an appropriate value to the TAB1IOC0 register (set the output mode of TOAB1T1 to TOAB1T3).

However, clear the TAB1OL0 bit to 0 and set the TAB1OE0 bit to 1 (enable positive phase output). Unless

this setting is made, the crest interrupt (INTTAB1CC0) and valley interrupt (INTTAB1OV) do not occur.

Consequently, the conversion start trigger signal of the A/D converter is not correctly generated.

• Set the TAB1IOC1 and TAB1IOC2 registers to 00H (the TIAB10 to TIAB13, EVTB1, and TRGB1 pins of TAB1

are not used).

• Clear the TAB1OPT0 register to 00H (select the compare register).

• Set an appropriate value to the TAB1CCR0 to TAB1CCR3 registers (set the default value for comparison for

starting the operation).

• Set the TAB1CTL0 register to 0xH (clear the TAB1CE bit to 0 and set the operating clock of TAB1).

• The operating clock of TAB1 set by the TAB1CTL0 register is also supplied to TAA4, and the count

operation is performed at the same timing. The operating clock of TAA4 set by the TAA4CTL0 register is

ignored.

• Set an appropriate value to the TAB1OPT1 and TAB1OPT2 registers.

• Set an appropriate value to the TAB1IOC3 register (set TOAB1B1 to TOAB1B3 in the output mode).

• Set an appropriate value to the TAB1DTC register (set the default value for comparison for starting the

operation).

(d) Setting of alternate function

• Set the port to alternate function mode using the port control mode setting.