Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 11 MOTOR CONTROL FUNCTION
R01UH0042EJ0500 Rev.5.00 Page 621 of 1513
Aug 12, 2011
(3) Intermittent batch rewrite mode (transfer culling mode)
This mode is set by clearing the TAB1OPT0.TAB1CMS bit to 0 and setting the TAB1OPT2.TAB1RDE bit to 1.
In this mode, the values written to each compare register are transferred to the internal buffer register all at once
after the culled transfer timing and compared with the counter value. The transfer timing is the timing at which an
interrupt is generated (INTTAB1CC0, INTTAB1OV) by interrupt culling.
For details of the interrupt culling function, see 11.4.3 Interrupt culling function.
(a) Rewriting procedure
If data is written to the TAB1CCR1 register, the data of the TAB1CCR0 to TAB1CCR3, TAB1OPT1, TAA4CCR0,
and TAA4CCR1 registers are transferred all at once to the internal buffer register at the next transfer timing.
Therefore, write to the TAB1CCR1 register last. Writing to the register is prohibited after the TAB1CCR1
register has been written until the transfer timing is generated (until the INTTAB1OV or INTTAB1CC0 interrupt
occurs). The operation procedure is as follows.
<1> Rewrite the TAB1CCR0, TAB1CCR2, TAB1CCR3, TAB1OPT1, TAA4CCR0, and TAA4CCR1 registers.
Do not rewrite registers that do not have to be rewritten.
<2> Rewrite the TAB1CCR1 register.
Rewrite the same value to the register even when it is not necessary to rewrite the TAB1CCR1 register.
<3> Hold the next rewriting pending until the transfer timing is generated.
Perform the next rewrite after the INTTAB1OV or INTTAB1CC0 interrupt has occurred.
<4> Return to <1>.